|
The following description of the tutorial on Contech
is subject to revision as the materials are prepared. If you have any questions
or suggestions of topics to cover, please send them to the lead presenter at
brian.railing@gatech.edu or via Google survey. |
Location
and Date
Morning of October 4th, 2015 at IISWC 2015
Presenters
Brian
P. Railing Georgia Institute of Technology
Eric R. Hein, Georgia Institute of Technology
Organizer: Thomas M. Conte, Georgia Institute of Technology
Abstract
In this tutorial, we will present Contech, a comprehensive
parallel program instrumentation and analysis framework that supports a
diversity of languages, runtimes, and architectures. We will introduce the task
graph representation that Contech uses and demonstrate how the framework
efficiently generates task graphs from parallel programs. Through hands-on
exercises, we will rapidly prototype a variety of analyses. There will also be
time to cover the instrumentation's design as well as how it can be extended to
cover new functionality and scenarios. The tutorial will use both x86 and ARM
platforms, and will assume a working knowledge of C / C++.
Contech's Key Features:
o Rich Representation
o Records Control Flow, Memory Accesses and Parallel Actions
o Common representation across program diversity
o
Language
Support
o C / C++ / Fortran
o
Parallel
Runtime Support
o Pthreads / OpenMP / MPI / Cilk
o
Architecture
Support
o X86 / ARM
o
Efficient
Execution
o Average of 3x Slowdown on x86
Goal
Participants will learn how to quickly instrument existing
parallel programs using Contech to collect a representative task graph.
Attendees are also expected to learn about the capabilities of Contech. And
most importantly, how to write analyses of task graphs to quickly examine
parallel programs.
Outline
o
Introduction (15min)
o Analyzing parallel programs in a unified framework
o Parallel Program Diversity
o Overview of Contech's Task Graph
representation and Analysis Support
o
Contech's Task Graph Representation (30min)
o Background of Task Graphs
o Description of the Task Graph Representation
o Diversity of supported paradigms and architecture independence
o Simple Visual Examples of Task Graphs
o
Parallel Program Instrumentation (45min)
o Instrumentation Design
o Compiling and Instrumenting Programs
o Extending the Instrumentation
o Performance Lessons Learned
o
Break (30min)
o
Analysis and Usage of a Contech Task Graph (45min)
o Example analyses
o Task Graph API
o Detailed capabilities
o
Hands-on Exercises (45min)
Presentation Files
Biographies
Brian Railing is a Ph.D. candidate in Computer Science at Georgia Institute
of Technology. He received his B.S. in Computer Science from Carnegie Mellon
University in 2004. He previously worked for Microsoft analyzing and improving
the performance of the Windows kernel before entering graduate studies at
Georgia Institute of Technology. His current work is on accurately representing
and analyzing parallel programs using Contech.
Eric Hein is a Ph.D. student in Electrical and Computer
Engineering at Georgia Institute of Technology. He received his B.S. in
Computer Engineering from the Milwaukee School of Engineering in 2011, and his
Master's from Georgia Institute of Technology in 2015.He is a primary developer
on Contech, and currently studies how emerging data-intensive workloads
interact with emerging memory systems.
Tom
Conte received his Bachelor of Electrical Engineering degree from the
University of Delaware in 1986; and, he received his M.S. and Ph.D. degrees
(also in Electrical Engineering) from the University of Illinois at
Urbana-Champaign in 1988 and 1992, respectively. From 1995 to 2008, he was on
the faculty of the department of Electrical and Computer Engineering and
Director of the Center for Embedded Systems Research at North Carolina State
University. He is currently a Professor joint appointed in the Schools of
Computer Science and Electrical & Computer Engineering at the Georgia
Institute of Technology.